What details will the hardware engineer of Niu Fork do?

There are many things to consider when completing a large hardware project. Therefore, this requirement for engineers is higher. And look at the following is a very good hardware engineer to do the sharing, I hope to help you.

Phenomenon , as long as the program is stable, the code is longer and the efficiency is not critical.

Comments: CPU speed and memory space are all bought with money. If you spend a few days to improve the efficiency of the program when writing code , then the cost saved by reducing the CPU frequency and reducing the memory capacity is definitely cost-effective. The CPLD/FPGA design is similar.

What color is the indicator on the second panel of the phenomenon ? I think the blue color is special, just choose it.

Comments: Other colors , such as red, green, yellow and orange, regardless of size (5MM or less), have matured for decades , the price is generally less than 5 cents , and blue is something that was invented in the last three or four years. Both technical maturity and supply stability are poor, and prices are four or five times more expensive. At present, the blue indicator light is only used when it cannot be replaced by other colors, such as displaying a video signal.

Phenomenon 3 This logic can also be used with the 74XX gate circuit, but it is too earthy, still use CPLD, it looks more upscale.

Comments: 74XX 's door circuit is only a few cents , and CPLD has at least dozens of pieces (GAL/PAL is only a few dollars, but the company does not recommend it). The cost has been increased by N times, and the work of production, documentation, etc. has been added several times.

Phenomenon 4 Our system requirements are so high, including MEM, CPU, FPGA and other chips must choose the fastest

Comment: In a high-speed system, not every part of work at high speed, and a device speed increase each level, the price to almost double, the other returned to signal integrity problems bring great negative impact.

Phenomenon 5 This board's PCB design requirements are not high, just use a thin line, automatically cloth it

Comments: Automated wiring must occupy a larger PCB area , and at the same time produce more than a lot of vias than manual wiring . In large batches of products, the factors considered by PCB manufacturers to cut prices are line width and The number of holes , which affect the yield of the PCB and the consumption of the drill bit , respectively , saves the cost of the supplier, and finds a reason for the price reduction.

Phenomenon, our system is 220V power supply, you don't have to worry about power consumption.

Comments: Low-power design is not just to save power. More benefits are reduced cost of power modules and cooling systems , and reduced electromagnetic radiation and thermal noise due to reduced current . As the temperature of the device decreases, the lifetime of the device increases accordingly (for every 10 degrees increase in the operating temperature of the semiconductor device, the lifetime is reduced by half).

Phenomenon 2, these bus signals are pulled with a resistor, feel relieved

Comments: There are many reasons why the signal needs to be pulled up, but not all of them have to be pulled. The pull-down resistor pulls a simple input signal, and the current is tens of microamps or less. However, if a signal is driven, the current will reach milliamperes. The current system is usually 32 bits of address data , and there may be After the 244/245 isolated bus and other signals are pulled up, the power consumption of a few watts is consumed by these resistors (do not use the concept of 8 cents per kilowatt to treat the power consumption of these watts).

Phenomenon 3, there are so many doors left in this FPGA, you can enjoy it.

Comments: The power consumption of FGPA is proportional to the number of flip-flops used and the number of flips , so the power consumption of the same model FPGA at different times of different circuits may differ by a factor of 100. Minimizing the number of flip-flops at high speeds is the fundamental way to reduce FPGA power consumption .

Phenomenon 4 These small chips have low power consumption, no need to consider

Comments: It is difficult to determine the power consumption of the chip that is not too complicated inside . It is mainly determined by the current on the pin. An ABT16244 consumes less than 1 mA without load, but its indicator is each foot. Can drive 60 mA load (such as matching tens of ohms of resistance), that is, the maximum power consumption of up to 60 * 16 = 960mA, of course, only the power supply current is so large, the heat is falling on the load.

Phenomenon 5, reducing power consumption is a matter for hardware personnel, and it has nothing to do with software.

Comments: The hardware is just a stage. The software is the software. The access of almost every chip on the bus and the flipping of each signal are almost controlled by software . If the software can reduce the number of external accesses (use more register variables, More use of internal CACHE, etc., timely response to interrupts (interrupts are often active low with pull-up resistors) and other specific measures for specific boards will greatly contribute to reducing power consumption.

Phenomenon 1 This CPU with a frequency of 100M can only handle 70%, and it is fine to change the 200M frequency.

Comments: The processing power of the system involves a variety of factors. In the communication business, the bottleneck is generally in the memory , the CPU is fast, and the external access is not fast.

Phenomenon 2 CPU with a larger CACHE, it should be faster

Comments: The increase in CACHE does not necessarily lead to an increase in system performance. In some cases, closing CACHE is faster than using CACHE . The reason is that the data moved to CACHE must be reused multiple times to improve system efficiency. Therefore, in the communication system, only the instruction CACHE is generally opened, and even if the data CACHE is opened, it is limited to a part of the storage space, such as the stack portion. At the same time, the program design also needs to take into account CACHE's capacity and block size. This involves the length and jump range of the key code loop body. If a loop is just a little bigger than CACHE, and it is repeated again, it will be miserable.

Phenomenon 3 So many tasks are interrupts or queries ? Or interrupt faster?

Comments: The real-time nature of the interruption is strong, but not necessarily fast. If there are a lot of interrupted tasks, this does not quit, and then comes later, and the system will crash in a while. If the number of tasks is large but frequent, the CPU's great energy is used in the overhead of interrupts. The system efficiency is extremely low. If the query method is used instead, the efficiency can be greatly improved, but the query sometimes cannot meet the real-time requirements. The best way is to query in the interrupt , that is, after an interrupt, all the accumulated tasks are processed and then exited.

The timing of the phenomenon four memory interface is the factory default configuration, no modification

Comments: The default values ​​set by the BSP for the memory interface are set according to the most conservative parameters. In practical applications, parameters such as bus operating frequency and waiting period should be properly allocated . Sometimes the frequency is lowered to increase the efficiency. For example, if the RAM access period is 70 ns and the bus frequency is 40 M, the access time of 3 cycles is 75 ns. If the bus frequency is 50 M, it must be set to 4 Cycles, the actual access time has slowed down to 80ns.

Phenomenon 5: A CPU can't handle it, it uses two distributed processing, and the processing power can be doubled.

Comments: For moving bricks, two people should be twice as efficient as one person ; for painting, one more person can only help. Use several CPUs to have more knowledge of the business before you can determine, minimize the cost of coordination between the two CPUs, so that 1+1 is as close as possible to 2, and not less than 1.

Phenomenon 1. This veneer has been produced in small batches. After a long test, no problems were found.

Comments: Hardware design and chip applications must comply with the relevant specifications, especially all the parameters mentioned in the chip manual (voltage, I / O level range, current, timing, temperature PCB wiring, power quality, etc.), can not rely on the test To verify. There are many products in the company that have had a painful lesson. The products have been sold for one or two years. The IC manufacturers have changed their production lines. Our board will not turn. The reason is that some people’s chip parameters have changed, but they have not exceeded the manual. The scope. If you take the manual as the standard, then he is not afraid of how to change, if the parameters become beyond the scope of the manual, you can also find him to claim (if your board can still turn, then your reliability is even more cattle).

Phenomenon 2, this part of the circuit, as long as the software is required to design this, there will be no problem.

Comments: Many electrical features on the hardware are directly controlled by the software, but the software is often accidental. After the program runs away, it is impossible to predict what will happen. The designer should ensure that no permanent damage is caused in a short period of time, regardless of the hardware in which the software is being operated.

Phenomenon three user operation errors can not blame me

Comments: It is right to ask the user to operate strictly according to the manual. However, when the user is a human being, there is a mistake when it is impossible to say that the wrong button is broken and the wrong plug is inserted. Therefore , all kinds of mistakes that users may make must be protected.

Phenomenon 4 The reason for the bad board is that the board on the opposite side has a problem, and it is not my responsibility.

Comments: For a variety of external hardware interfaces should have sufficient compatibility , you can not because the other party's signal is not normal, you will rest. It should not only affect the part of the function that is related to it, but other functions should work properly, should not be completely striked, or even permanently damaged, and once the interface is restored, you should immediately return to normal.